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TPD12S521DBTR

2022-07-15 来源:星星旅游
TPD12S521

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SINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

FEATURES

•Single-ChipESDSolutionforHigh-DefinitionMultimediaInterface(HDMI)Driver

DBT PACKAGE(TOP VIEW)•0.9pFCapacitanceforHigh-SpeedTransition5V_SUPPLY1385V_OUTMinimizedDifferentialSignaling(TMDS)LinesLV_SUPPLY237ESD_BYP•0.05-pFMatchingCapacitanceBetweentheGND336GNDTMDS_D2+435TMDS_D2+DifferentialSignalPair

TMDS_GND534TMDS_GND•IntegratedLevelShiftingfortheControlLinesTMDS_D2–633TMDS_D2–TMDS_D1+732TMDS_D1+•±8-kVContactESDProtectiononTMDS_GND831TMDS_GNDExternalLines

TMDS_D1–930TMDS_D1–TMDS_D0+1029TMDS_D0+•

38-PinThinShrinkSmall-OutlinePackageTMDS_GND1128TMDS_GNDTMDS_D0–1227(TSSOP)ProvidesSeamlessLayoutOptionTMDS_D0–TMDS_CK+1326TMDS_CK+WithHDMIConnectorTMDS_GND1425TMDS_GNDTMDS_CK–1524TMDS_CK–•BackdriveProtectionCE_REMOTE_IN1623CE_REMOTE_OUT•Lead-FreePackage

DDC_CLK_IN1722DDC_CLK_OUTDDC_DAT_IN1821DDC_DAT_OUT•

On-ChipCurrentRegulatorWith55-mAHOTPLUG_DET_IN1920HOTPLUG_DET_OUTCurrentOutput

APPLICATIONS

•PCs

•ConsumerElectronics•Set-TopBoxes•

DVDRWPlayers

DESCRIPTION/ORDERINGINFORMATION

TheTPD12S521isasingle-chipESDsolutionforthehigh-definitionmultimediainterface(HDMI)transmitterport.Inmanycases,thecoreICs,suchasthescalarchipset,maynothaverobustESDcellstosustainsystem-levelESDstrikes.Inthesecases,theTPD12S521providesthedesiredsystemlevelESDprotection,suchasthetheIEC61000-4-2(Level4)ESD,byabsorbingtheenergyassociatedwiththeESDstrike.

WhileprovidingtheESDprotection,theTPD12S521addslittleornoadditionalglitchinthehigh-speeddifferentialsignals(seeFigure3andFigure4).Thehigh-speedtransitionminimizeddifferentialsignaling(TMDS)linesaddonly0.9pFcapacitancetothelines.Inaddition,themonolithicintegratedcircuittechnologyensuresthatthereisexcellentmatchingbetweenthetwo-signalpairofthedifferentialline.ThisisadirectadvantageoverdiscreteESDclampsolutionswherevariationsbetweentwodifferentESDclampsmaysignificantlydegradethedifferentialsignalquality.

Thelow-speedcontrollinesoffervoltage-levelshiftingtoeliminatetheneedforanexternalvoltagelevel-shifterIC.ThecontrollineESDclampsadd3.5pFcapacitancetothecontrollines.The38-pinDBTpackageoffersseamlesslayoutroutingoptiontoeliminatetheroutingglitchforthedifferentialsignalpair.

TheTPD12S521providesanon-chipregulatorwithcurrentoutputratingsof55mAatpin38.Maximumovercurrentprotectionoutputdropat55mAon5V_OUTis100mV.ThiscurrentenablestheHDMIreceiverdetectionevenwhenthereceiverdeviceispowered-off.DBTpackagepitch(0.5mm)matcheswithHDMIconnectorpitch.Inaddition,pinmappingfollowsthesameorderastheHDMIconnectorpinmapping.ThisHDMIreceiverportprotectionandinterfacedeviceisspecificallydesignedfornext-generationHDMItransmitterprotection.

Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.

PRODUCTPREVIEWinformationconcernsproductsintheformativeordesignphaseofdevelopment.CharacteristicdataandCopyright©2007,TexasInstrumentsIncorporated

otherspecificationsaredesigngoals.TexasInstrumentsreservestherighttochangeordiscontinuetheseproductswithoutnotice.

PRODUCT󰀀PREVIEWTPD12S521

SINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

www.ti.comORDERINGINFORMATION

STANDARDFINISH

TA

–40°Cto85°C(1)(2)(3)

PACKAGETSSOP-38

(1)(2)

LEAD-FREEFINISH

ORDERABLEPARTNUMBER(3)TPD12S521DBTR

TOP-SIDEMARKINGPREVIEW

ORDERABLEPARTNUMBER(3)TPD12S521DBTR

TOP-SIDEMARKINGPREVIEW

Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging.

Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTIwebsiteatwww.ti.com.

Partsareshippedintape-and-reelform,unlessotherwisespecified.

ELECTRICALSCHEMATIC

ESD_BYP5V_SUPPLYTMDS_D2+TMDS_GNDTMDS_D1+TMDS_GNDTMDS_D1–TMDS_D0+TMDS_GNDTMDS_D0–TMDS_CK+TMDS_GNDTMDS_CK–PRODUCT󰀀PREVIEW2

TMDS_D2–LV SupplyCE_REMOTE_INCE_REMOTE_OUTLV SupplyDDC_DAT_INDDC_DAT_OUTLV SupplyDDC_CLK_INLV SupplyDDC_CLK_OUTHOTPLUG_DET_INHOTPLUG_DET_OUT5V_SUPPLY55-mAOvercurrentSwitch5V_OUTSubmitDocumentationFeedback

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TPD12S521

www.ti.comSINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

138D2+GNDD2–D1+GNDTPD12S521D1–D0+GNDHDMI󰀀Core󰀀ChipD0–CLK+GNDCLK–CE_RNCD_CK1920D_DTGND5OUTHTDTHDMIHigh-speed󰀀linesBoardTracesConnectorGNDVIAConnected󰀀to󰀀5V󰀀PlaneControl󰀀linesVIAConnected󰀀to󰀀LV󰀀Plane5󰀀V󰀀outVIAConnected󰀀to󰀀GND󰀀PlaneA.Externalbypasscapacitorsandresistorcomponentsnotincluded

Figure1.BoardLayoutforHDMITransmitterUsingTPD12S521DBTR

PINDESCRIPTION

PINNO.NAMEDESCRIPTION

4,35TMDS_D2+TMDS0.9-pFESDprotection(1)6,33TMDS_D2–TMDS0.9-pFESDprotection(1)7,32TMDS_D1+TMDS0.9-pFESDprotection(1)9,30TMDS_D1–TMDS0.9-pFESDprotection(2)10,29TMDS_D0+TMDS0.9-pFESDprotection(2)12,27TMDS_D0–TMDS0.9-pFESDprotection(2)13,26TMDS_CK+TMDS0.9-pFESDprotection(2)15,24TMDS_CK–TMDS0.9-pFESDprotection(2)16CE_REMOTE_INLV_SUPPLYreferencedlogiclevelin

23CE_REMOTE_OUT5V_SUPPLYreferencedlogiclevelout,plus3.5-pFESD17DDC_CLK_INLV_SUPPLYreferencedlogiclevelin

22DDC_CLK_OUT5V_SUPPLYreferencedlogiclevelout,plus3.5-pFESD18DDC_DAT_INLV_SUPPLYreferencedlogiclevelin

21DDC_DAT_OUT5V_SUPPLYreferencedlogiclevelout,plus3.5-pFESD19HOTPLUG_DET_INLV_SUPPLYreferencedlogiclevelin

20HOTPLUG_DET_OUT

5V_SUPPLYreferencedlogiclevelout,plus3.5-pFESD2LV_SUPPLYBiasforCE/DDC/HOTPLUGlevelshifters15V_SUPPLYCurrentsourcefor5V_OUT

385V_OUT55-mAminimumovercurrentprotected5-Voutput.Thisoutputmustbebypassedwitha0.1-μFceramiccapacitor.

37

ESD_BYPESDbypass.Thispinmustbeconnectedtoa0.1-μFceramiccapacitor.3,5,8,11,14,25,28,31,34,36GND/TMDS_GND

GNDreference

(1)ThesetwopinsmustbeconnectedtogetherinlineonthePCB.(2)

ThesetwopinsmustbeconnectedtogetherinlineonthePCB.

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PRODUCT󰀀PREVIEWTPD12S521

SINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

www.ti.comAbsoluteMaximumRatings

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

MIN

VCC5VCC3

DCvoltageatanychannelinput

Tstg

Storagetemperaturerange

GND–0.5

–65

MAX

6

VCC+0.5

150

UNITVV°C

RecommendedOperatingConditions

MIN

OperatingsupplyvoltageBiassupplyvoltage

Operatingtemperaturerange

5V_SUPPLYLV_SUPPLY

1–40

NOM

53.3

MAX5.55.585

UNITVV°C

PRODUCT󰀀PREVIEW4

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TPD12S521

www.ti.comSINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

ElectricalCharacteristics

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

PARAMETER

TESTCONDITIONS

MIN

TYPMAXUNITICC5Operatingsupplycurrent5V_SUPPLY=5V110130μAICC3Biassupplycurrent

LV_SUPPLY=3.3V

15μAVDROP5V_OUTovercurrentoutputdrop5V_SUPPLY=5V,IOUT=55mA65100mVISC5V_OUTshort-circuitcurrentlimit5V_SUPPLY=5V,5V_OUT=GND90135175mAIOFF

OFF-stateleakagecurrent,level-shiftingNFET

LV_SUPPLY=0V

0.1

5

μA

TMDS_D[2:0]+/–,TMDS_CK+/–,

CE_REMOTE_OUT,IBACKDRIVE

CurrentconductedfromoutputpinstoV_SUPPLYrailswhenpowereddown

5V_SUPPLYDDC_DAT_OUT,0.15μA

DDC_CLK_OUT,

HOTPLUG_DET_OUT,5V_OUT

VONVoltagedropacrosslevel-shiftingNFET

whenON

LV_SUPPLY=2.5V,VS=GND,IDS=3mA

7595140mVVIF=8mA,Topdiode0.60.850.95FDiodeforwardvoltageTA=25°C(1)

Bottomdiode

0.6

0.85

0.95

VVPins4,7,10,13,20–24,27,30,33(1)(2)

IEC±8ESDESDwithstandvoltagePins1,2,16–19,37,38(1)(3)HBM

±2

kVVChannelclampvoltagePositivetransients9CLat8-kVHBMESDTA=25°C(1)(3)Negativetransients–9VRDynamicresistance

I=1A,TPositivetransients3DYNA=25°C(4)Negativetransients

1.5ΩILEAKTMDSchannelleakagecurrentTA=25°C(1)

0.011μACIN,TMDSTMDSchannelinputcapacitance5V_SUPPLY=(1)

5V,Measuredat1MHz,VBIAS=2.5V0.91.1

pFΔCTMDSchannelinputcapacitance5V_SUPPLY=5V,Measuredat1MHz,TMDSIN,matching

VBIAS=2.5V(1)(5)

0.05pFCMUTUAL

Mutualcapacitancebetweensignalpin5V_SUPPLY=0V,Measuredat1MHz,andadjacentsignalpin

VBIAS=2.5V(1)

0.07

pF

DDC

3.54CIN

Level-shiftinginputcapacitance,5V_SUPPLY=0V,Measuredat100KHz,capacitancetoGND

VBIAS=2.5V(1)

CEC3.54pFHP

3.5

4

(1)Thisparameterisspecifiedbydesignandverifiedbydevicecharacterization.(2)StandardIEC61000-4-2,C(3)Model(HBM)DISCHARGE=150pF,RperMIL-STD-883,MethodDISCHARGE=330Ω

Human-Body3015,C(4)DISCHARGE=100pF,RDISCHARGE=1.5kΩThesemeasurementsperformedwithnoexternalcapacitoronESD_BYP.(5)Intrapairmatching,eachTMDSpair(i.e.,D+,D–)

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PRODUCT󰀀PREVIEWTPD12S521

SINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

www.ti.comTYPICALPERFORMANCE

TypicalFilterPerformance(TA=25°C,DCBias=0V,50-ΩEnvironment)

–1–2–3Insertion Loss (dB)–4–5–6–7–8–9–10PRODUCT󰀀PREVIEW6

310100Frequency (MHz)10006000Figure2.InsertionLossvsFrequency(TMDS_D1–toGND)

Figure3.EyeDiagramWithTPD12S521

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TPD12S521

www.ti.comSINGLE-CHIPHDMITRANSMITTERPORTPROTECTIONANDINTERFACEDEVICE

SLVS639–OCTOBER2007

TYPICALPERFORMANCE(continued)

Figure4.EyeDiagramWithoutTPD12S521

Figure5.TestBoardtoMeasureEyeDiagramfortheTPD12S521(RefertoEyeDiagramPlot)

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PRODUCT󰀀PREVIEWIMPORTANTNOTICE

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ApplicationsAudioAutomotiveBroadbandDigitalControlMilitary

OpticalNetworkingSecurityTelephonyVideo&ImagingWireless

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