BSIFEATURESVery Low Power/Voltage CMOS SRAM64K X 16 bitDESCRIPTIONBS616LV1010•Very low operation voltage : 2.4 ~ 5.5V•Very low power consumption :Vcc= 3.0VC-grade : 20mA (Max.) operating currentI-grade : 25mA (Max.) operating current0.02uA (Typ.) CMOS standby currentVcc= 5.0VC-grade : 35mA (Max.) operating currentI-grade : 40mA (Max.) operating current0.4uA (Typ.) CMOS standby current•High speed access time : -70 70ns (Max.) at Vcc = 3.0V•Automatic power down when chip is deselected•Three state outputs and TTL compatible•Fully static operation•Data retention supply voltage as low as 1.5V•Easy expansion with CE and OE options•I/O Configuration x8/x16 selectable by LB and UB pinThe BS616LV1010 is a high performance, very low power CMOS Static Random Access Memory organized as 65,536 words by 16 bits and operates from a wide range of 2.4V to 5.5V supply voltage.Advanced CMOS technology and circuit techniques provide both highspeed and low power features with a typical CMOS standby currentof 0.02uA and maximum access time of 70ns in 3V operation.Easy memory expansion is provided by an active LOW chip enable(CE) and active LOW output enable(OE) and three-state outputdrivers.The BS616LV1010 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV1010 is available in the JEDEC standard 44-pin TSOPType II and 48-pin BGA package.PRODUCT FAMILYPRODUCT FAMILY BS616LV1010EC BS616LV1010AC BS616LV1010EI BS616LV1010AI OPERATING TEMPERATURE Vcc RANGE SPEED (ns) Vcc=3.0VPOWER DISSIPATION STANDBY Operating (ICCSB1, Max)(ICC, Max)PKG TYPE TSOP2-44 BGA-48-0608TSOP2-44 BGA-48-0608Vcc=5.0VVcc=3.0VVcc=5.0VVcc=3.0V +0C to +70C O O 2.4V ~ 5.5V70 3uA 0.5uA35mA20mA-40C to +85C O O 2.4V ~ 5.5V70 5uA1.5uA40mA25mAPIN CONFIGURATIONSA4A3A2A1A0CEDQ0DQ1DQ2DQ3VCCGNDDQ4DQ5DQ6DQ7WEA15A14A13A12NC123456789101112131415161718192021221444342414039383736353433323130292827262524236A5A6A7OEUBLBDQ15DQ14DQ13DQ12GNDVCCDQ11DQ10DQ9DQ8NCA8A9A10A11NCBLOCK DIAGRAMA8A13A15A14A12A7A6A5A4AddressInputBufferBS616LV1010ECBS616LV1010EI18RowDecoder512Memory Array512 x 20482048DQ016DataInputBuffer16Column I/O2345ALBOEA0A1A2NC....DQ15....Write DriverSense Amp128Column Decoder16DataOutput16BufferBIO8UBA3A4CEIO0CIO9IO10A5A6IO1IO2CEWEOEUBLBControl14Address Input BufferDVSSIO11NCA7IO3VCCEVCCIO12NCNCIO4VSSA11A9A3A2A1A0A10FIO14IO13A14A15IO5IO6VccGndGIO15NCA12A13WEIO7HNCA8A9A10A11NCBrilliance Semiconductor Inc.reserves the right to modify document contents without notice.R0201-BS616LV10101Revision 2.2April 2001BSIPIN DESCRIPTIONSBS616LV1010NameA0-A15 Address InputCE Chip Enable InputFunctionThese 16 address inputs select one of the 65,536 x 16-bit words in the RAM.CE is active LOW. Chip enables must be active when data read from or write to thedevice. if chip enable is not active, the device is deselected and is ina standby powermode. The DQ pins will be in the high impedance state when the device is deselected.WE Write Enable InputThe write enable input is active LOW and controls read and writeoperations. With thechip selected, when WE is HIGH and OE is LOW, output data will be present on theDQ pins; when WE is LOW, the data present on the DQ pins will bewritten into theselected memory location.OE Output Enable InputThe output enable input is active LOW. If the output enable is active while the chip isselected and the write enable is inactive, data will be present on the DQ pins and theywill be enabled. The DQ pins will be in the high impedance statewhen OE is inactive.LB and UB Data Byte Control InputDQ0 -DQ15 Data Input/OutputPortsVccGndLower byte and upper byte data input/output control pins.These 16 bi-directional ports are used to read data from or write data into the RAM.Power SupplyGroundTRUTH TABLEMODENot selected(Power Down)Output DisabledReadCEHLLWEXHHOEXHLLBXXLHLLWriteLLXHLUBXXLLHLLHDQ0~DQ7High ZHigh ZDoutHigh ZDoutDinXDinDQ8~DQ15High ZHigh ZDoutDoutHigh ZDinDinXVccCURRENTICCSB, ICCSB1ICCICCICCICCICCICCICCR0201-BS616LV10102Revision 2.2April 2001BSIABSOLUTE MAXIMUM RATINGS(1)SYMBOL VTERM TBIAS TSTG PT IOUTPARAMETERTerminal Voltage withRespect to GNDTemperature Under BiasStorage TemperaturePower DissipationDC Output CurrentBS616LV1010OPERATING RANGEUNITSVORATING-0.5 toVcc+0.5-40 to +125-60 to +1501.020RANGECommercialIndustrialAMBIENTTEMPERATURE0 O C to +70 O C-40 O C to +85 O CVcc 2.4V~5.5V 2.4V ~5.5VCCOWmACAPACITANCE (1)(TA = 25oC, f = 1.0 MHz)SYMBOLPARAMETERInput Capacitance Input/Output Capacitance CONDITIONS MAX.UNIT1. Stresses greater than those listed under ABSOLUTE MAXIMUMCIN=VIN0V6 pFRATINGS may cause permanent damage to the device. This is astress rating only and functional operation of the device at theseI/O0VCDQV=8 pFor any other conditions above those indicated in the operational sections of this specification is not implied. Exposure toabsolute 1. This parameter is guaranteed and not tested.maximum rating conditions for extended periods may affectreliability.DC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC )PARAMETER NAMEVILVIHIILIOL VOL VOH ICCPARAMETER Guaranteed Input Low Voltage(2)Guaranteed Input High Voltage(2)Input Leakage CurrentOutput Leakage Current Output Low Voltage Output High Voltage Operating Power Supply Current TEST CONDITIONS Vcc=3.0V Vcc=5.0V Vcc=3.0V Vcc=5.0V MIN. TYP. (1) MAX. UNITS-0.5 -- 0.8 V 2.0 2.2 -- -- Vcc+0.2-- 1 V uAVcc = Max, VIN = 0V to VccVcc = Max, CE = VIH, or OE = VIH,VI/O = 0V to VccVcc = Max, IOL = 2mAVcc = Min, IOH = -1mACE = VIL, IDQ = 0mA, F = Fmax(3)Vcc=3.0V Vcc=5.0V Vcc=3.0V Vcc=5.0V Vcc=3.0V Vcc=5.0V Vcc=3.0V Vcc=5.0V -- -- 1 uA-- -- 0.4 V 2.4 -- -- V-- -- 20 mA -- -- 35 -- -- 1 -- -- 2 -- 0.02 0.5 -- 0.4 3 mA ICCSB Standby Current-TTL =CE VIH, IDQ = 0mA CE Њ Vcc-0.2V, ICCSB1 Standby Current-CMOS VINЊ Vcc - 0.2V or VINЉ 0.2VVcc=3.0V Vcc=5.0V uA 1. Typical characteristics are at TA = 25oC.2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.3. Fmax= 1/tRC.DATA RETENTION CHARACTERISTICS ( TA = 0oC to + 70oC )SYMBOLVDRICCDRtCDRtRPARAMETERVcc for Data RetentionData Retention CurrentChip Deselect to DataRetention TimeOperation Recovery TimeTEST CONDITIONSCE Њ Vcc - 0.2VVINЊ Vcc - 0.2V or VINЉ 0.2VCE Њ Vcc - 0.2VVINЊ Vcc - 0.2V or VINЉ 0.2VSee Retention WaveformMIN. TYP. (1) MAX.1.5--0TRC (2)--0.02------0.3----UNITSVuAnsns1. Vcc = 1.5V,TA= + 25OC2.tRC= Read Cycle TimeR0201-BS616LV10103Revision 2.2April 2001BSILOW VCCDATA RETENTION WAVEFORM ( CE Controlled )Data Retention ModeBS616LV1010VccVIHVccVDR≥1.5VVcctCDR≥CE Vcc -0.2VtRVIHCEAC TEST CONDITIONSInput Pulse LevelsInput Rise and Fall TimesInput and OutputTiming Reference LevelVcc/0V5ns0.5VccKEY TO SWITCHING WAVEFORMSWAVEFORMINPUTSMUST BESTEADYMAY CHANGEFROM H TO L1269ΩOUTPUTSMUST BESTEADYWILL BECHANGEFROM H TO LWILL BECHANGEFROM L TO HCHANGE :STATEUNKNOWNCENTERLINE IS HIGHIMPEDANCE”OFF ”STATEAC TEST LOADS AND WAVEFORMS3.3VOUTPUT100PFINCLUDINGJIG ANDSCOPE1269Ω3.3VOUTPUTMAY CHANGEFROM L TO HDON T CARE:ANY CHANGEPERMITTEDDOES NOTAPPLY5PF1404ΩINCLUDINGJIG ANDSCOPE,1404ΩFIGURE 1ATHEVENIN EQUIVALENT667ΩALL INPUT PULSESFIGURE 1BOUTPUT1.73VVccGND10%90%90%10%→←→←5nsFIGURE 2AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 3.0V )READ CYCLEJEDECPARAMETERNAMEPARAMETERNAMEDESCRIPTIONRead Cycle TimeAddress Access TimeChip Select Access TimeData Byte Control Access TimeOutput Enable to Output ValidChip Select to Output Low ZData Byte Control to Output Low ZOutput Enable to Output in Low ZChip Deselect to Output in High ZData Byte Control to Output High ZOutput Disable to Output in High ZOutput Disable to Output Address ChangeBS616LV1010-70MIN. TYP. MAX.UNITtAVAXtAVQVtE1LQVtBAtGLQVtE1LQXtBEtGLQXtE1HQZtBDOtGHQZtAXOXtRCtAAtACStBAtOEtCLZtBEtOLZtCHZtBDOtOHZtOH70--(CE)(LB,UB)(CE)(LB,UB)(CE)(LB,UB)------10101000010--------------------------70704050------353030--nsnsnsnsnsnsnsnsnsnsnsnsR0201-BS616LV10104Revision 2.2April 2001BSISWITCHING WAVEFORMS (READ CYCLE)READ CYCLE1(1,2,4)BS616LV1010tRCADDRESStDOUTtOHAAtOHREAD CYCLE2(1,3,4)CEtACStBALB,UBtBEDOUTt(5)CLZtBDOt(5)CHZREAD CYCLE3(1,4)tADDRESSRCtOEAAtOECEtOHtOLZt(5)CLZtACStOHZ(5)(1,5)tCHZtBALB,UBtBEDOUTtBDONOTES:1. WE is high for read Cycle.2. Device is continuously selected when CE =VIL.3. Address valid prior to or coincident with CE transition low.4. OE =VIL.±5. Transition is measured 500mV from steady state withCL= 5pF as shown in Figure 1B.The parameter is guaranteed but not 100% tested.R0201-BS616LV1010Revision 2.2April 20015BSIAC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC,Vcc= 3.0V )WRITE CYCLEJEDECPARAMETERNAMEPARAMETERNAMEDESCRIPTIONWrite Cycle TimeChip Select to End of WriteAddress Setup TimeAddress Valid to End of WriteWrite Pulse WidthWrite recovery TimeDate Byte Control to End of WriteWrite to Output in High ZData to Write Time OverlapData Hold from Write TimeOutput Disable to Output in High ZEnd of Write to Output ActiveBS616LV1010BS616LV1010-70MIN. TYP. MAX.UNITtAVAXtE1LWHtAVWLtAVWHtWLWHtWHAXtBWtWLQZtDVWHtWHDXtGHQZtWHOXtWCtCWtAStAWtWPtWRtBWtWHZtDWtDHtOHZtOW707007050(CE,WE)(LB,UB)060030005--------------------------------------30----30--nsnsnsnsnsnsnsnsnsnsnsnsSWITCHING WAVEFORMS (WRITE CYCLE)WRITE CYCLE1(1)tWCADDRESStWROE(3)tCW(5)(11)CEtBWLB,UBtAWWE(3)tAS(4,10)tWP(2)tOHZDOUTttDWDHDINR0201-BS616LV10106Revision 2.2April 2001BSIWRITE CYCLE2(1,6)BS616LV1010tWCADDRESStCW(5)(11)CEtBWLB,UB(12)tAWWEtWRtWP(2)(3)tAS(4,10)tDHtWHZDOUT(7)(8)tDWtDH(8,9)DINNOTES:1. WE must be high during address transitions.2. The internal write time of the memory is defined by the overlap of CE and WE low. All signalsmust be active to initiate a write and any one signal can terminate a write by going inactive.The data input setup and hold timing should be referenced to the second transition edge ofthe signal that terminates the write.3. TWRis measured from the earlier of CE or WE going high at the end of write cycle.4. During this period, DQ pins are in the output state so that the input signals of opposite phaseto the outputs must not be applied.5. If the CE low transition occurs simultaneously with the WE low transitions or after the WEtransition, output remain in a high impedance state.6. OE is continuously low (OE =VIL).7.DOUTis the same phase of write data of this write cycle.8.DOUTis the read data of next address.9. If CE goes low during this period, DQ pins are in the output state. Then the data input signals ofopposite phase to the outputs must not be applied to them.10. Transition is measured 500mV from steady state withCL= 5pF as shown in Figure 1B. ±The parameter is guaranteed but not 100% tested.11.TCW is measured from the later of CE going low to the end of write.12. The change of Read/Write cycle must accompany with CE or address toggled.R0201-BS616LV10107Revision 2.2April 2001BSIORDERING INFORMATIONBS616LV1010BS616LV1010X X --Y YSPEED70: 70nsGRADEC: +0oC ~ +70oCI: -40oC ~ +85oCPACKAGEE: TSOP II -44 PINA: BGA -48 PIN(6x8mm)PACKAGE DIMENSIONSTSOP2-44R0201-BS616LV10108Revision 2.2April 2001BSIPACKAGE DIMENSIONS (continued)NOTES:BS616LV10101: CONTROLLING DIMENSIONS ARE IN MILLIMETERS.2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL \"N\" IS THE NUMBER OF SOLDER BALLS.1.4 Max.BALL PITCH e = 0.75D8.0E6.0N48D15.25E13.75D1eVIEW A48 mini-BGA (6 x 8)E1R0201-BS616LV10109Revision 2.2April 2001BSIREVISION HISTORYRevision2.2BS616LV1010Description2001 Data Sheet releaseDateApr. 15, 2001NoteR0201-BS616LV101010Revision 2.2April 2001