Board Level ApplicationNotes for DFN and QFNPackages
Prepared by: Steve St. GermainON Semiconductor
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APPLICATION NOTE
INTRODUCTION
Various ON Semiconductor components are packaged inan advanced Dual or Quad Flat−Pack No−Lead package(DFN/QFN). The DFN/QFN platform represents the latestin surface mount packaging technology, it is important thatthe design of the Mounting Pads of the Printed Circuit Board(PCB), Soldermask and Stencil pattern, along with theassembly process, all follow the suggested guidelinesoutlined in this document.
DFN/QFN Package Overview
The DFN/QFN platform offers a versatility which allowseither a single or multiple semiconductor devices to beconnected together within a leadless package. Thispackaging flexibility is illustrated in Figure 1 where fourdevices are packaged together with a custom padconfiguration.
Figure 2. The Underside of a Single−Chip 10 Pin
DFN Package
WirebondDieLeadframeFigure 3. Cross−Section of a Single−Chip
DFN Package
Figure 1. The Underside of a 4−Chip 16 Pin
DFN Package
Figure 2 illustrates a single site DFN semiconductordevice package which allows for a large device.
Figure 3 illustrates how the package height is reduced toa minimum by having both the die and wirebond pads on thesame plane. When mounted, the leads are directly attachedto the board without a space−consuming standoff, which isinherent in a leaded package.
Figure 3 also illustrates how the ends of the leads are flushwith the edge of the package. This configuration allows forthe maximum die size within a given footprint, whilemaximizing the board space efficiency.
In addition to these features, the DFN/QFN package hasexcellent thermal dissipation and reduced electricalparasitics due to its efficient and compact design.
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Printed Circuit Board Solder Pad DesignGuidelines
Refer to the case outline (specification sheet) drawing forthe specific DFN/QFN package to be mounted. Based on thenominal package footprint dimensions from the casedrawing. The PCB mounting pads need to be larger than thenominal package footprint (see Figure 4).
Note: On the occasion that there is not enough room to growthe PCB mounting pads per these guidelines, therecommendation would be to come as close to theseguidelines as possible.
0.0127−0.0254(0.0005−0.001)0.0508−0.0762(0.002−0.003)As their titles describe, the NSMD contact pads have thesolder mask pulled away from the solderable metallization,while the SMD pads have the solder mask over the edge ofthe metallization, as shown in Figure 5. With the SMD Pads,the solder mask restricts the flow of solder paste on the topof the metallization which prevents the solder from flowingalong the side of the metal pad. This is different from theNSMD configuration where the solder will flow around boththe top and the sides of the metallization.
Typically, the NSMD pads are preferred over the SMDconfiguration since defining the location and size of thecopper pad is easier to control than the solder mask. This isbased on the fact that the copper etching process is capableof a tighter tolerance than the solder masking process. Thisalso allows for visual inspection of solder fillet.
In addition, the SMD pads will inherently create a stressconcentration point where the solder wets to the pad on topof the lead. This stress concentration point is reduced whenthe solder is allowed to flow down the sides of the leads inthe NSMD configuration.
Printed Circuit Board Solder Mask DesignGuidelines
When dimensionally possible, the solder mask shouldbe located within a range of 0.0762–0.1270 mm(0.003–0.005 in) away from the edge of the PCB mountingpad (see Figure 6). This spacing is used to compensate forthe registration tolerances of the solder mask, as well as toinsure that the solder is not inhibited by the mask as itreflows along the sides of the metal pad.
The solder mask web (between openings) is thecontrolling factor in the pattern, and needs to be held to aminimum of 0.1016 mm (0.004 in). This minimum is thecurrent PCB suppliers standard minimum web formanufacturability. Because of this web restriction, soldermask openings around PCB pads may need to be less thanthe recommended shown. Whenever possible, keeping tothe range given will provide for the best results.
PCB MountingPads0.0762−0.1270(0.003−0.005)All aroundlarger than PCBmounting pads0.1524(0.006)0.0762(0.003)Device FootprintNominal Device Footprintand PCB Mounting Pads
Figure 4. 10 Pin DFN Package Footprint Shown
with PCB Mounting Pads
Printed Circuit Board Solder Mask DesignGuidelines
SMD and NSMD Pad Configurations
There are two different types of PCB pad configurationscommonly used for surface mount leadless DFN/QFN stylepackages. The different configurations are:
1.Non Solder Masked Defined (NSMD)2.Solder Masked Defined (SMD)
Solder MaskOpening
0.1016(0.004)MinimumSoldermaskWeb
SolderablePad
Soldermask Openings shownwith PCB Mounting PadsSoldermask OpeningsPCB Mounting Pads
NSMD
SMD
0.1016Minimum(0.004)SoldermaskWeb
Solder MaskOverlay
Figure 5. Comparison of NSMD vs. SMD Pads
Figure 6. Typical DFN Package − PCB Mounting
Pads Shown with Soldermask Openings
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DFN/QFN Board Mounting Process
The DFN/QFN board mounting process is optimized byfirst defining and controlling the following.
1.Solderable metallization on the PCB contacts.2.Choice of proper solder paste.3.Solder paste on the PCB.4.Package placement.
5.Reflow of the solder paste.6.Final solder joint inspection.
Recommendations for each of these processes are locatedbelow.
PCB Solderable Metallization
Solder Screening onto the PCB
There are currently three common solderable coatingswhich are used for PCB surface mount devices. In any case,it is imperative that the coating is uniform, conforming, andfree of impurities to insure a consistant solderable system.The first coating consists of an Organic SolderabilityProtectant (OSP) applied over the bare copper feature. OSPcoating assists in reducing oxidation in order to preserve thecopper metallization for soldering. It allows for multiplepasses through reflow ovens without degradation of thesolderability. The OSP coating is dissolved by the flux whenthe solder paste is applied to the metal features. Coatingthickness recommended by OSP manufacturers is between0.25 and 0.35 microns.
The second coating is a metalized coating which consistsof plated electroless nickel over the copper pad, followed bya coat of immersion gold. The thickness of the electrolessnickel layer is determined by the allowable internal materialstresses and the temperature excursions the board will besubjected to throughout its lifetime. Even though the goldmetallization is typically a self−limiting process, thethickness should be at least 0.05 mm thick, and not consist ofmore than 5% of the overall solder volume. Havingexcessive gold in the solder joint can create goldembitterment which may affect the reliability of the joint.The third is a tin−lead coating, commonly called Hot AirSolder Level (HASL).This type of PCB pad finish is notrecommended for DFN/QFN type packages. The majorissue is the inability to consistently control the amount ofsolder coating applied to each pad. This results indome−shaped pads of various heights. As the industry drivesfor finer and finer pitch, solder bridging becomes a commonproblem between mounting pads.
Solder Type
Stencil screening the solder paste onto the PCB iscommonly used in the industry. The recommended stencilthickness used is 0.075 mm to 0.127 mm (0.003 in to0.005 in). The sidewalls of the stencil openings should betapered approximately 5° to facilitate the release of the pastewhen the stencil is removed from the PCB.
The stencil opening should be the same size as the PCBmounting pad. The exception is when there is a large centerflag on the device. Then the stencil opening should allow for70−80% coverage of the PCB mounting pad. This openingshould also be divided into smaller cavities to aid in the flowof solder during the reflow process (see Figure 7). Dividingthe larger die pads into smaller screen openings reduces therisk of solder voiding and allows the solder joints for thesmaller terminal pads to be at the same height as the largerones.
PCB Center Mounting PadSame Size asPCB Mounting PadPackage OutlineStencil Pattern Over PCBMounting Pads
Package Outline
PCB Center Mounting PadsStencil Opening
70−80% of PCBcenter mounting padbroken up intosmaller openings
Figure 7. Typical DFN Package with StencilOpenings Shown Over PCB Mounting PadsPackage Placement onto the PCB
Pick and place equipment with the standard tolerance of\"0.05 mm (0.002 in) or better is recommended. Thepackage will tend to center itself and correct for slightplacement errors during the reflow process due to thesurface tension of the solder.
Solder Reflow
Solder paste such as Cookson Electronics’ WS3060 witha Type 3 or smaller sphere size is recommended. TheWS3060 has a water−soluble flux for cleaning. CooksonElectronics’ PNC0106A can be used if a no−clean flux ispreferred.
Once the package is placed on the PC board along with thesolder paste, a standard surface mount reflow process can beused to mount the part. Figures 8 and 9 are examples ofstandard reflow profiles for standard eutectic and lead freesolder alloys.
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The exact profile will be determined, and is available, bythe manufacture of the paste since the chemistry andviscosity of the flux matrix will vary. These variations willrequire small changes in the profile in order to achieve anoptimized process.
2502001831501005000
100
200
300Time (sec)
400
500
Less than2°C/secSoakZone30 to 120 secTimeAboveLiquidusTemperature (°C)Peak of 225°CIf required, removal of the residual solder flux can becompleted by using the recommended procedures set forthby the flux manufacturer.
Final Solder Inspection
The inspection of the solder joints is commonlyperformed with the use of an X−ray inspection system. Withthis tool, one can locate defects such as shorts between pads,open contacts, voids within the solder as well as anyextraneous solder.
In addition to searching for defects, the mounted deviceshould be rotated on its side to inspect the sides of the solderjoints with an X−ray inspection system. The solder jointsshould have enough solder volume with the proper stand−offheight so that an “Hour Glass” shaped connection is notformed as shown below in Figure 10. “Hour Glass” solderjoints are a reliability concern and must be avoided.
PreferredSolder JointUndesirable“Hour Glass’’Solder JointFigure 8. Typical Reflow Profile for Eutectic
Tin/Lead Solder
30025020015010050094
204
314
425
Time (sec)
Lessthan 2°C/secTimeaboveliquidus60−150secPCBTemperature (°C)Peak of 260°CFigure 10. Side View of DFN Illustrating Preferred
and Undesirable Solder Joints
SoakZone60−180secFigure 9. Typical Reflow Profile for Pb−Free Solder
In general, the temperature of the part should be raised notmore than 2°C/sec during the initial stages of the reflowprofile. The soak zone then occurs when the part isapproximately 150°C and should last for 60 to 180 secondsfor Pb−free profiles (30−120 sec for Eutectic profiles).Typically, extending the time in the soak zone will reduce therisk of voiding within the solder. The temperature is thenraised and will be above the liquidus of the solder for 60 to150 seconds for Pb−free profiles (30−100 sec for Eutecticprofiles) depending on the mass of the board. The peaktemperature of the profile should be between 245 and 260°Cfor Pb−free solder alloys (205−225°C) for eutectic solders.
Rework Procedure
Due to the fact that the DFN/QFN’s are leadless devices,the entire package must be removed from the PC board ifthere is an issue with the solder joints. It is important tominimize the chance of overheating neighboring devicesduring the removal of the package since the devices aretypically in close proximity with each other.
Standard SMT rework systems are recommended for thisprocedure since the airflow and temperature gradients canbe carefully controlled. It is also recommend that the PCboard be placed in an oven at 125°C for four to eight hoursprior to heating the parts to remove excess moisture from thepackages. In order to control the region which will beexposed to reflow temperatures, the board should be heatedto a 100_C by conduction through the backside of the boardin the location of the device. Typically, heating nozzles arethen used to increase the temperature locally.
Once the device’s solder joints are heated above theirliquidus temperature, the package is quickly removed andthe pads on the PC board are cleaned. The cleaning of thepads is typically performed with a blade−style conductivetool with a desoldering braid. A no clean flux is used duringthis process in order to simplify the procedure.
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Solder paste is then deposited or screened onto the site inpreparation of mounting a new device. Due to the closeproximity of the neighboring packages in most PC boardconfigurations, a miniature stencil for the individualcomponent is typically required. The same stencil designthat was originally used to mount the package can be appliedto the mini−stencil for redressing the pads.
Due to the small pad configurations of the DFN/QFN, andsince the pads are on the underside of the package, a manualpick and place procedure without the aid of magnification isnot recommended. A dual image optical system where theunderside of the package can be aligned to the PC boardshould be used instead.
Reflowing the component onto the board can beaccomplished by either passing the board through theoriginal reflow profile, or by selectively heating the packagewith the same process that was used to remove it. The benefitwith subjecting the entire board to a second reflow is that thenew part will be mounted consistently and by a profile thatis already defined. The disadvantage is that all of the otherdevices mounted with the same solder type will be reflowedfor a second time. If subjecting all of the parts to a secondreflow is either a concern or unacceptable for a specificapplication, than the localized reflow option would be therecommended procedure.
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